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NIIT UNIVERSITY

Dr Zeesha Mishra

  • Assistant Professor
  • Computer Science & Engineering
Prof Zeesha Mishra V1
Dr Zeesha Mishra is currently serving as an Assistant Professor in the Department of Computer Science and Engineering at NIIT University, Neemrana, India. She holds a Bachelor of Technology (BTech) degree in Information Technology and a Master of Technology (MTech) degree in VLSI Design from Chhattisgarh Swami Vivekananda Technical University, Bhilai. She earned her PhD from the National Institute of Technology (NIT), Raipur. Her research interests encompass cryptography and network security, with a specialized focus on the hardware implementation of lightweight cryptographic algorithms. She has published over 40 research papers in high-impact national and international journals and peer-reviewed conference proceedings.

Qualifications

  • PhD (Cryptography)
  • MTech (VLSI Design)
  • BTech (Information Technology)

Experience

  • Total – 8+ years
  • Teaching and Research – 8+ years

Courses Taught

  • Cryptography
  • Fundamental of Cyber Security
  • System and Network Security
  • Digital Electronics

Research Area(s)

  • Cryptography
  • Lightweight cryptography
  • Hardware implementation of lightweight cryptographic algorithms for image and text data

Selected Publications

  • Zeesha Mishra, Pallab Kumar Nath and Bibhudendra Acharya, “High throughput unified architecture of LEA algorithm for image encryption”, Microprocessors and Microsystems (Elsevier), vol.78, pp.103214, 2020.
  • Zeesha Mishra and Bibhudendra Acharya, “High throughput and low area architectures of secure IoT algorithm for medical image encryption”, Journal of Information Security and Applications (Elsevier), vol.53, pp.102533, 2020.
  • K.P. Raja, Pulkit Singh, Z. Mishra, and B. Acharya, “Efficient Area and Throughput Implementations of Lightweight Simeck Cipher for Resource-constrained Applications”, International Journal of Ad Hoc and Ubiquitous Computing, (inderscience), vol.43, no. 3pp 170-182, 2023.
  • K. P. Raja, Z. Mishra, Pulkit Singh, and B. Acharya, “Efficient Hardware Implementations of Lightweight Simeck Cipher for Resource-constrained Applications”, Integration, vol. 88, pp. 1-7, 2022.

Publications

Journals
  • Zeesha Mishra, Pallab Kumar Nath and Bibhudendra Acharya, “High throughput unified architecture of LEA algorithm for image encryption”, Microprocessors and Microsystems (Elsevier), vol.78, pp.103214, 2020.
  • Zeesha Mishra and Bibhudendra Acharya, High throughput and low area • architectures of secure IoT algorithm for medical image encryption," Journal of Information Security and Applications (Elsevier), vol.53, pp.102533, 2020.
  • K.P. Raja, Pulkit Singh, Z. Mishra, and B. Acharya, “Efficient Area and Throughput Implementations of Lightweight Simeck Cipher for Resource-constrained Applications,” International Journal of Ad Hoc and Ubiquitous Computing, (inderscience), vol.43, no. 3pp 170-182, 2023.
  • K. P. Raja, Z. Mishra, Pulkit Singh, and B. Acharya, “Efficient Hardware Implementations of Lightweight Simeck Cipher for Resource-constrained Applications” , Integration, vol. 88, pp. 1-7, 2022.
  • Zeesha Mishra and Bibhudendra Acharya, “High Throughput Novel Architectures of TEA family for Highspeed IoT and RFID Applications," Journal of Information Security and Applications (Elsevier), vol.61, pp.102906, 2021.
  • Zeesha Mishra and Bibhudendra Acharya, High Throughput Compact Area Architecture of XXTEA for IoT application. Sādhanā, (Springer), vol. 48, no.2, pp.80, 2023.
  • Shaivya Shukla, Onika Parmar, Amit Singh Rajput, and Zeesha Mishra, “Stepped Doped High k VDMOS: Switching Characteristics” Physics state of solid”,( Wiley) Vol. 220, no 15, 2023.
  • Sidar, D.S., Parmar, O. and Mishra, Z., 2024. Dual‐Stepped Gate Vertical Double‐Diffused Metal‐Oxide‐Semiconductor Field‐Effect Transistor with Enhanced Device Performance. physica status solidi (a) ”(Wiley), p.2300593. 2024.
  • Zeesha Mishra and Bibhudendra Acharya, Efficient hardware implementation of TEA, XTEA and XXTEA lightweight ciphers for low resource IoT applications," International Journal of High Performance Systems Architecture International (IJHPSA) (inderscience), vol10, no. 2, pp 80-88, 2021.
  • Gandu Ramu, Zeesha Mishra, Pulkit Singh and Bibhudendra Acharya “Performance optimized architectures of Piccolo block cipher for low resource IoT applications”. International Journal of High- Performance Systems Architecture, (IJHPSA) (inderscience), vol 9 no 1, pp.49-57, 2020.
  • Apeksha Kamble, Zeesha Mishra, and Bibhudendra Acharya Hardware Implementation of LBlock and XXTEA SIMECK Lightweight Block Cipher for Resource-Constrained IoT Application International Journal of High Performance Systems Architecture International (IJHPSA) (inderscience). Vol. 11, No. 3, 2023.
  • Shubham Mishra, Zeesha Mishra, Saroj Kumar Panigrahy and Bibhudendra Acharya “Multistage pipelined architectures of piccolo cipher for high-speed IoT applications” International Journal of High Performance Systems Architecture International (IJHPSA) (inderscience). vol.11, no. 2 pp 96-104 2022.
  • Aakanksha Baghel, Zeesha Mishra*, Onika Parmar and Amit Singh Rajput, “Optimised architectures of Midori block cipher for area constrained IoT applications” International Journal of High Performance Systems Architecture International (IJHPSA) (inderscience). vol 11, no 4, 2023.
  • Shweta Kumari, Zeesha Mishra, and Bibhudendra Acharya, Efficient Hardware Implementation of SIMECK Lightweight Block Cipher International Journal of High Performance Systems Architecture International (IJHPSA) (inderscience). Vol 11, no. 3 pp 129-136, 2023.
  • Digvijay Das Sirmour, Dr Zeesha Mishra, Dr Onika Parmar and Dr Amit Singh Rajput “Performance Analysis of Various Multiplier Prototypes in FPGA in Industrial and manufacturing engineering (Elsevier).
Books and book chapters
  • Pranav, G. Krishna, Zeesha Mishra, and Bibhudendra Acharya. "Lightweight Cryptographic Solutions for Resource-constrained Devices in Cyber-Physical Systems." In Intelligent Security Solutions for Cyber-Physical Systems, pp. 66-88. Chapman and Hall/CRC, 2024.
Conference Papers
  • Zeesha Mishra, Gandu Ramu and Bibhudendra Acharya, “High Speed Low Area VLSI Architecture for LEA Encryption Algorithm” In Proceedings of the Third International Conference on Microelectronics, Computing and Communication Systems, pp. 155-160. Springer, Singapore, 2019.
  • Zeesha Mishra, Shubham Mishra, and Bibhudendra Acharya, “LEA 192: High Speed Architecture of Lightweight Block Cipher" In 3rd International conference on Data Engineering and Communication. (Awarded best paper) Published in International Journal of Innovative Technology and Exploring Engineering (IJITEE), Vol 9, December 2019.
  • Zeesha Mishra, Shubham Mishra, and Bibhudendra Acharya, “LEA:128 High Frequency Architecture with Image Analysis" In IEEE International Conference for Emerging Technology (INCET), pp. 1-5, 2020.
  • Zeesha Mishra, Shubham Mishra, and Bibhudendra Acharya, “High Throughput Novel Architecture of SIT Cipher for IoT Application" In Fifth International Conference on Nanoelectronics, Circuits and Communication System (NCCS-2019), pp. 267-276. Springer, Singapore, 2020.
  • Gandu Ramu, Zeesha Mishra and Bibhudendra Acharya, "Hardware implementation of Piccolo Encryption Algorithm for constrained RFID application" In 9th Annual Information Technology, Electromechanical Engineering and Microelectronics Conference (IEMECON), Jaipur, India, pp. 85-89, 2019.
  • Shubham Mishra, Zeesha Mishra and Bibhudendra acharya “Area Optimized Hardware Architecture of Piccolo-80 Lightweight Block Cipher” In 6th International Conference on Nanoelectronics, Circuits and Communication System (NCCS-2020), 9th-10th ARTCEE, BSNL, Hazaribag Road, Ranchi, 2020.
  • Shubham Mishra, Zeesha Mishra and Bibhudendra Acharya, "A High Throughput and Speed Architecture of Lightweight Cipher LEA”, In International Conference on Computing, Communication, and Intelligent Systems (ICCCIS), Greater Noida, India, pp. 458-462, 2019.
  • Zeesha Mishra, Bibhudendra Acharya, “A comprehensive survey on high definition image and video encryption techniques”, Conference Proceedings International Journal of Arts & Sciences (IJAS) International Conference for Engineering and Technology to be held at Harvard Medical School, Boston, Massachusetts from 22 – 26 may, 2017.
  • Kella, Chaitanya, Zeesha Mishra, and Bibhudendra Acharya. "A compact & low power architecture of XXTEA192 lightweight block cipher." In 2021 6th International Conference on Communication and Electronics Systems (ICCES), pp. 972-976. IEEE, 2021.
  • Shubham Sharma, Zeesha Mishra and Bibhudendra acharya, “Hybrid Key-length Architecture of mCrypton for resource contained Embedded / IoT applications” in (NCCS-2022), ARTCEE, BSNL, Hazaribag Road, Ranchi, 2020.
  • Shaivya Shukla, Onika Parmar, Amit Rajput and Dr Zeesha Mishra, “Design and Analysis of Multiplexer using Domino CMOS Logic” in (RCCAI-2022), Manipal Institute of Technology, MAHE, Manipal, India.
  • Shashank Chandrakar, Siddharth Dewangan, Dr Zeesha Mishra and Bibhudendra Acharya, “FPGA Implementation of SLIM an Ultra-Lightweight Block Cipher for IoT Applications” in (RCCAI-2022), Manipal Insitute of Technology, MAHE, Manipal, India.
  • Yahuti Sahu, Dr Amit Singh Rajput, Dr Onika Parmar and Dr Zeesha Mishra “Leakage Power reduction in CMOS inverter at 16nm technology” in (RCCAI-2022), Manipal Institute of Technology, MAHE, Manipal, India.
  • Neha Khute, Zeesha Mishra Dr Onika Parmar and Dr Amit Singh Rajput “Optimized Hardware Implementation of XXTEA-192 for Resource Constrained Application”, “in (IEEE International Conference CCET-2022), SAGE University Bhopal.
  • Indrajeet Kumar, Dr Zeesha Mishra Dr Onika Parmar and Dr Amit Singh Rajput “IoT Based Motor Pump Control System”, “in (IEEE International Conference CCET-2022), SAGE University Bhopal.
  • Akansha Baghel, Dr Zeesha Mishra Dr Onika Parmar and Dr Amit Singh Rajput “International Conference of IEEE Forum Goa JUNE 2022.

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